In the compound semiconductor integrated circuits, when two metal layers having different potentials is required to cross-connect, the area of the cross-connection between two metal layers requires good isolation. Conventional technology forms an isolation layer made of polyimide to isolate the cross-connection of two metal layers having different potentials. Usually an isolation layer of polyimide is firstly formed on a bottom metal layer, and then forming a top metal layer on the polyimide isolation layer, wherein the bottom metal layer and the top metal layer are two metal layers having different potentials. However, the polyimide isolation layer is needed only in the intersection area and the adjacent area of the cross-connection of the bottom metal layer and the top layer. There is no need of the polyimide isolation layer in other area. The polyimide isolation layer usually will not be removed by etching in convention technology. Hence, the polyimide isolation layer is not only existing in the intersection area of the cross-connection of the bottom metal layer and the top layer, but also existing in other area where it does not need the polyimide isolation layer.
However, since the polyimide itself has such a rate of water absorption that the existence of the polyimide isolation layer will seriously affect the moisture resistance ability of the compound semiconductor integrated circuit. The polyimide isolation layer in the intersection area of the cross-connection of the bottom metal layer and the top layer is needed for isolating the two layers having different potentials, the bottom metal layer and the top layer. But the existence of the polyimide isolation layer in other wide area where does not need the polyimide isolation layer is the main reason that reduces the moisture resistance ability of the compound semiconductor integrated circuit.
Furthermore, the isolation layer must be made of a kind of low dielectric materials having a low dielectric constant, in order to isolate the two layers having different potentials, the bottom metal layer and the top layer. And due to the existence of the isolation layer, especially the essential existence of the isolation layer in the intersection area of the cross-connection of the bottom metal layer and the top layer, thus the impedance of the compound semiconductor integrated circuit around the intersection area of the cross-connection of the bottom metal layer and the top layer is affected by the isolation layer.
Accordingly, the inventor has developed a layout method for compound semiconductor integrated circuits, which may avoid the above mentioned drawbacks, may significantly enhance the moisture resistance ability of the compound semiconductor integrated circuits, and also may enhance the performance of the compound semiconductor integrated circuits, may take into account economic considerations. Therefore, the present invention then has been invented.